Trends in Semiconductor Manufacturing: Wafer-Level and Panel-Level Packaging

One of the most important shifts in semiconductor manufacturing today is not just the continued growth of wafer-level packaging (WLP), but the increasing reliance on enabling, highly specialized process technologies. As device architectures evolve toward heterogeneous integration (HI) and chiplet-based designs, key technologies such as wet processing, electrochemical plating (ECP), plasma-enhanced chemical vapor deposition (PECVD), […]

Past-Year Successes Will Fuel New Advancements in 2024

We enter 2024 following one of the most eventful years yet for ACM Research. This recap of our key milestones from 2023 helps illustrate why we are looking to the year ahead with great enthusiasm, as well as why we are positioned to play a leading role in the chip sector as it heads toward […]

ACM Research Celebrates Opening of New Oregon Facility, Contributing to the Pacific Northwest’s Growing Semiconductor Industry  

The 11,000-square-foot multi-use property features offices, warehouse space and a cleanroom/demonstration lab HILLSBORO, Ore. – November 9, 2023: ACM Research, Inc. (ACM) (NASDAQ: ACMR), a leading supplier of wafer processing solutions for semiconductor and advanced wafer-level packaging (WLP) applications, today announced the grand opening of its new multi-use facility in Hillsboro, Ore., on November 28. […]

Optimizing Photoresist Removal and Metal Lift-Off with Megasonics

Megasonic cleaning with ACM’s advanced SAPS wafer cleaning technology provides an efficient, resource-optimized solution for the complex challenges associated with photoresist (PR) removal and metal lift-off (MLO) processes in semiconductor manufacturing. In this blog, we explain how the combination of ACM’s Smart Megasonix systems, MegPie transducer, and the active puddle method delivers superior removal performance with good uniformity and particle neutrality. Learn how implementing ACM’s approach successfully cuts traditional PR and MLO process times from several hours at high temperatures to minutes at lower temperatures.

ACM’s SAPS Technology Optimizes Single-Wafer Cleaning

In working to improve previous generations of megasonic wafer-cleaning systems, ACM discovered how to enhance megasonic uniformity across wafers with an innovative solution called Space Alternated Phase Shift (SAPS™) technology. SAPS technology outperforms conventional megasonic cleaning products and efficiently exceeds expectations beyond removing random defects. Learn more about how ACM’s unique SAPS cleaning systems enable more efficient manufacturing, reduce chemical consumption, enable time and cost savings, and increase wafer yields.

Leading the Way in Electroplating

What Is Electroplating or ECP? Electroplating, also known as electrochemical deposition or electrodeposition, is a process for producing a metal coating on a solid substrate through the reduction of cations of that metal using a direct electric current. The part to be coated acts as the cathode (negative electrode) of an electrolytic cell; the electrolyte […]

Making Smart Megasonix™ Even Smarter

Traditional megasonic cleaning combines high-frequency sound waves, typically in the range of 360 kHz to 2,000 kHz, with a liquid flow process to remove submicron particles from wafer surfaces. The fluid motion created by the high-frequency megasonics is intended to result in low substrate damage. However, conventional megasonic cleaning has reached practical limits because it […]

Wet Bevel Etch and Cleaning Improves Wafer Yields and Throughput

Throughout this blog series, we’re examining vital wafer cleaning processes and how we are addressing them through our solutions. In this post, we’ll look at bevel etch: what it is, associated challenges, and how our approach offers notable advantages for tackling those challenges compared to traditional dry bevel etch. The bevel etch process is used […]

Post-CMP Cleaning Options for SiC and Silicon Substrates

Our last blog post addressed in-depth the rise of silicon carbide (SiC)-based chips and how we address the cleaning challenges surrounding them. With their innate thinness, brittleness, and tendency toward surface inconsistencies, SiC wafers require particular care with respect to their processing and handling, and we have a broad portfolio of tools that make sure […]

Overcoming Silicon Carbide (SiC) Manufacturing Challenges

Why Silicon Carbide (SiC) Is Critical for Next-Generation Chips Silicon carbide (SiC) substrate-based chips are on the (very) fast track due to the need for power semiconductors that can handle high voltage under challenging conditions. The automotive industry wants SiC chips so it can increase range and decrease charging time for electric vehicles (EVs). The […]