Our last blog post addressed in-depth the rise of silicon carbide (SiC)-based chips and how we address the cleaning challenges surrounding them. With their innate thinness, brittleness, and tendency toward surface inconsistencies, SiC wafers require particular care with respect to their processing and handling, and we have a broad portfolio of tools that make sure these needs are addressed.
In this installment, we take a look at our newest cleaning capability – one that is vital both for SiC and for traditional silicon wafers: post-CMP cleaning. According to MarketWatch, the global post-CMP cleaning solutions market was valued at US $142.2 million in 2020 and is expected to reach US$197.8 million by the end of 2027.
A physical pre-clean process following the CMP step, post-CMP cleaning plays a critical role in meeting stringent CMP defects for device reliability and yield requirements. It is needed to reduce particles, organic residues, and metallic contaminants from wafers with a variety of properties – without generating damage to the wafer surface.
While CMP tools traditionally have had a cleaner attached, SiC wafers are typically 6 inches in diameter, and 6-inch tools don’t always have a cleaner attached. This is because they were primarily created for non-compound semiconductor wafers, which may not have as stringent cleaning requirements. In creating our Ultra C post-CMP tool, we looked at how best to build on our existing proven technology – including our Smart Megasonix technology, in order to meet customers’ varied requirements for this application.
Keeping it clean
When you remove wafers from a CMP tool, they go into what’s essentially a big sink, where a cassette with wafers from the CMP process has cold deionized water flowing over it. When the still-wet wafer is removed, it’s taken into a chamber for frontside and backside brushing and a bevel clean. With a SiC wafer, you may have CMP slurry that doesn’t come off fully during the clean, which means it will still be there when you dry it – and you’ll have contaminants left on the surface. Equipping our post-CMP tool with the doubled-sided brushing and clean step ensures removal of all slurry and SiC residues after wafer polishing.
This incarnation of our post-CMP tool is what we call the wet-in dry-out (WIDO) pre-clean configuration. After the brush step takes place, the wafers kept wet while being moved to either two or four clean chambers and are processed using up to three chemicals, with a rinse in between each chemical, rinsed again with DI water, and then exposed to a nitrogen (N2) spin dry . Once this is complete, the resulting wafers exhibit superior particle performance and are ready to move on to testing and die prep.
Pick the tool that’s best for you
You can opt for a 6- or 8-inch (150 or 200mm) version of our post-CMP tool for SiC wafers, as well as an 8- or 12-inch (200 or 300mm) version for silicon wafers, with four or six chambers. While the integrated WIDO configuration (which attaches directly to the CMP tool) is our most in-demand because keeping the wafers wet during processing is highly desirable – and essential for SiC, as noted previously – we have created additional versions to meet specific customer requirements.
We also offer an offline WIDO pre-clean tool. With this incarnation, wet wafers are transferred from the CMP tool to a DI water bath, and then manually moved to the WIDO offline tool. It uses the same cleaning process and achieves the same particle performance as the online WIDO configuration of the system, so if you need this fab floor space-saving option, we’ve got you covered.
If you use a CMP platform with a built-in cleaning chamber from which silicon wafers emerge from the tool dry, you need our dry-in dry-out (DIDO) option, available in a standalone pre-clean tool, with a smaller footprint than the WIDO pre-clean tool. With the DIDO configuration, wafers are manually transferred to the pre-clean tool via the loadport, then processed from there the same as with the WIDO pre-clean tool. SiC wafers can’t be run on this tool, as they require the WIDO approach to prevent breakage during wafer-in.
Growing expectations
While we’re experiencing some of the same challenges as other companies in the industry with respect to parts availability, delivery times are shortening as supply chain issues continue to improve. We’re excited to be engaging with you as we work to roll out our Ultra C post-CMP tool. We have interest from a number of chipmakers in Europe and the U.S., and customers in China are already running wafers.
We look forward to working with you to engineer and build the ACM tool that best meets your post-CMP cleaning needs.