Why Silicon Carbide (SiC) Is Critical for Next-Generation Chips
Silicon carbide (SiC) substrate-based chips are on the (very) fast track due to the need for power semiconductors that can handle high voltage under challenging conditions. The automotive industry wants SiC chips so it can increase range and decrease charging time for electric vehicles (EVs). The telecom industry wants them for 6G. And the energy industry wants them for more efficient switching for power generation, storage and transmission
The latest figures from Yole Group indicate a CAGR of 20% from 2024-2030 for the power SiC market, reaching $10.3 billion by 2030. Meanwhile, the gallium nitride (GaN) market, which uses SiC substrates, is growing at a very respectable 42% CAGR through 2030. The transition from 6-inch to 8-inch and now, finally, 12-inch wafers will help to accelerate market adoption.
Indeed, SiC solves many problems, especially related to heat, voltage and frequency. But it also creates a lot of headaches for wafer and chip manufacturers. SiC wafers are expensive, time consuming and energy-intensive to produce. Additionally, manufacturing devices on SiC wafers requires specially adapted equipment and processes. For both SiC wafer production and device fabrication, yield is an enormous challenge.
The Top SiC Wafer Manufacturing Challenges
Silicon wafers are cheap. The ingots from which they’re sliced are grown in a matter of hours. Wafering (the slicing process) is also fast and produces hundreds of wafers per ingot at a low cost.
By comparison, consider the dozen or so steps required to produce SiC wafers. They start with growing the boules, which look more like hockey pucks than ingots and take weeks to grow in ovens almost half as hot as the sun. Each wafer is then painstakingly sawed off the boule with a diamond saw. If you’re lucky, you get 40, maybe 60, wafers off a boule, but yield is often very low.
The resulting SiC wafers are half as thick as silicon, very brittle, and require substantial processing to meet the draconian requirements of device manufacturers. Plus, they’re transparent, so the traditional sensors used in handling can’t even see them properly. Equipment manufacturers have incorporated new generations of sensors into their tools just allow identifying and lifting the SiC wafers without breaking them. And, of course, being so fragile, these wafers tend to bow, so they require special materials, processes and handling equipment for post-wafering cleaning and polishing.
Device-Level SiC Fabrication Issues: Heat, Bowing, and Yield
Now you have these transparent, brittle and expensive SiC wafers to nurse through the device manufacturing process. (This applies to both straight SiC wafers and GaN-on-SiC wafers.)
Start by considering challenges of ion implantation. Dopants will not diffuse into SiC like they do into silicon—they want to form craters—and the requisite anneal at 1800oC can carbonize the surface.
Next, consider the steps related to lithography. The tendency of these ultra-thin SiC wafers to bow challenges the photo process. A thick layer of photoresist must be spun onto the wafer and patterned prior to metal deposition. The tools need to be able to handle the bowing.
Speaking of metal deposition, that poses another challenge. Thick layers of metals such as gallium nitride, gold, nickel, copper and silver/tin must be deposited with excellent uniformity without damaging the brittle wafer.
Once the metals have been deposited, the photoresist must be removed. Easy? Of course not. Since standard sulfuric peroxide mix (SPM) processes will attack the metal, the wafers with their thick photoresist are soaked in a tank of solvents for a set amount of time, then transferred to a single wafer chamber for a final clean and dry.
Then comes etch. Some of the metals cannot be etched using a specific chemistry, so the patterning of the metal is done using a sacrificial layer of photoresist. That layer is patterned using traditional methods, then the metal is deposited on top. The final step is to dissolve the resist, lifting away any metal on top and leaving the rest of the patterned metal. Not easy.
How ACM Research Addresses SiC Wafer and Device Cleaning Challenges
As a leading supplier of SiC cleaning tools for both wafer and device manufacturing, ACM has had a front-row seat to these challenges. We’ve worked closely with our customers to address them, adapting our equipment to the specificities of SiC wafer and device manufacturing. Our SiC-enabled tools are equipped with state-of-the-art sensors so the wafers can be identified and carefully handled.
In tools for wafer manufacturing, we’ve also equipped our post-chemical-mechanical planarization (CMP) tool with doubled-sided brushing and a clean step. This removes all the slurry and SiC residues after wafer polishing.
Innovations in SiC Wafer Cleaning and Handling Equipment
Our tools used for cleaning during the various device manufacturing steps are equipped with handling systems that can cope with the bow and transparency of SiC wafers. They include:
- The ACM Ultra C coater and Ultra C developer – handles all the exigencies of photoresist coating and development
- The ACM Ultra C GIII – deposits the thick metal layers with excellent uniformity without damaging the brittle wafers
- The ACM Ultra C PR stripper – adapted into a combined soak and single-wafer tool to remove the thick photoresist once the metals have been deposited
- The ACM Smart Megasonix™ – enables resist removal, lifting away any metal on top while leaving the rest of the patterned metal. For SiC, the system has been further adapted to a single wafer chamber with the appropriate solvent, which can then be filtered and recycled. A final rinse using deionized water (DIW) is followed by a drying step.
- The ACM Ultra C SAPS II/V tool – equipped with a choice of binary nozzle or ACM’s proprietary Smart Megasonix for cleaning with standard wet chemical cleaning solutions DHF, SC1 and SC2.
The Future of SiC Manufacturing Efficiency
As the demand for SiC-based chips continues its upward trajectory, increasing throughput will become even more important. At ACM Research, we are rising to the challenge—including forthcoming new equipment that is specially dedicated to SiC wafer cleaning. Be on the lookout!